Design Revision and Keep Project On Schedule
Services ASIC Design-For-Test (DFT)
Industry Video Chip OEM / Program Guide Content
Application Multi-Function Programmable Video Controller
Other Coordination with ASIC Vendor (Texas Instruments,
(a subsidiary of Gemstar) designs video chipsets that enable the distribution
of program guide content through VCRs and television sets. These chips
are then sold to major manufacturers of consumer electronics (i.e.
Phillips, Sony, Magnavox etc.) to enable program guide functionality.
After initial production, discrepancies required a revision to the
design. The contractor that had previously provided DFT services was
no longer available to assist with the new revision. In
order to meet the schedule for tape-out, all DFT work had to be completed
in 6 weeks a schedule with no room for errors. Since
the revision was unanticipated, cost containment was a high priority.
design was moderately complex and included embedded RAM with BIST
(Built-in Self-Test) as well as a MIPS Jade microprocessor
core. The design had already reached fabrication, but a number of
discrepancies required a new revision of the device. During the interim,
the company that previously provided DFT services exited the market
leaving VideoGuide without resources to prepare the revised
design for Test and Manufacturing.
The design itself
posed several issues, which complicated test preparation and generation.
The biggest complication from a schedule viewpoint was integration
of existing canned IDDQ vectors
for the MIPS core, with IDDQ vectors generated
during the ATPG process. This process had previously required substantial
custom scripting and functional debug of the IDDQ
vectors prior to hand-off to the ASIC vendor. An additional complication
was that this design was to be manufactured with 3 different packages
and pin-outs using the same raw die.
flow was brand new to the vendor, and required separate vector
sets for each package.
intensity and focus unique to Dynazigns culture, we executed
an agreement and began work within 72 hours. Because of a close relationship
with Texas Instruments (the ASIC vendor), we were given permission
to work at the Texas Instruments ASIC Design Center in Waltham, MA
for the duration of the process. This allowed us to work with the
TI support personnel on a daily basis to ensure that the multi-package
flow and the IDDQ integration moved forward
In the final analysis,
Dynazign enabled VideoGuide to tape-out on schedule, improve fault
coverage, and beat the cost estimate by 10%.